comp.unix.programmer

make: Automatic variable for all dependencies


Is there a portable way to name all dependencies of a target in the
command to build this target?  Say, I want to link a number of object
files to the resulting binary, I'd like not to have to repeat the list
of object files in the linker command

        program: foo.o bar.o yadda.o
                $(CC) -o $_at_ foo.o bar.o yadda.o

In FreeBSD and OpenBSD I can write

                $(CC) -o $_at_ $>

and GNU make allows

                $(CC) -o $_at_ $^

while POSIX doesn't seem to have anything like that.  I know I can
define a variable myself but that can become tedious when you have
many targets and have to make up a new variable for each one.  So I
think the answer to my question is "no portable way", right?

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Written by Steve Keller 06/10/2011 5.08.58
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23/05/2012 22.45.42